F-Tile Ethernet Multirate Intel® FPGA IP用户指南

ID 714307
日期 6/20/2022
Public
文档目录

2.10. Avalon® 存储器映射的重配置接口

F-Tile Ethernet Multirate IP core支持这些 Avalon 存储器映射接口
  • Ethernet重配置 Avalon 存储器映射接口访问硬核和软核IP CSR。每个端口例化一个接口。
  • 收发器重配置 Avalon 存储器映射接口访问收发器寄存器。每个收发器通道例化一个接口。
下表列出了不同数量的端口的接口。
表 41.  Ethernet重配置 Avalon® Memory-Mapped Interface的信号关于信号描述,请参考F-Tile Ethernet Intel FPGA Hard IP用户指南
端口数量 信号名称
1

Port 0:

i_p0_reconfig_eth_addr[13:0]

i_p0_reconfig_eth_read

i_p0_reconfig_eth_write

i_p0_reconfig_eth_byteenable[3:0]

o_p0_reconfig_eth_readdata[31:0]

o_p0_reconfig_eth_readdata_valid

i_p0_reconfig_eth_writedata[31:0]

o_p0_reconfig_eth_waitrequest

2

Port 0:

i_p0_reconfig_eth_addr[13:0]

i_p0_reconfig_eth_read

i_p0_reconfig_eth_write

i_p0_reconfig_eth_byteenable[3:0]

o_p0_reconfig_eth_readdata[31:0]

o_p0_reconfig_eth_readdata_valid

i_p0_reconfig_eth_writedata[31:0]

o_p0_reconfig_eth_waitrequest

Port 1:

i_p1_reconfig_eth_addr[13:0]

i_p1_reconfig_eth_read

i_p1_reconfig_eth_write

i_p1_reconfig_eth_byteenable[3:0]

o_p1_reconfig_eth_readdata[31:0]

o_p1_reconfig_eth_readdata_valid

i_p1_reconfig_eth_writedata[31:0]

o_p1_reconfig_eth_waitrequest

4

Port 0:

i_p0_reconfig_eth_addr[13:0]

i_p0_reconfig_eth_read

i_p0_reconfig_eth_write

i_p0_reconfig_eth_byteenable[3:0]

o_p0_reconfig_eth_readdata[31:0]

o_p0_reconfig_eth_readdata_valid

i_p0_reconfig_eth_writedata[31:0]

o_p0_reconfig_eth_waitrequest

Port 1:

i_p1_reconfig_eth_addr[13:0]

i_p1_reconfig_eth_read

i_p1_reconfig_eth_write

i_p1_reconfig_eth_byteenable[3:0]

o_p1_reconfig_eth_readdata[31:0]

o_p1_reconfig_eth_readdata_valid

i_p1_reconfig_eth_writedata[31:0]

o_p1_reconfig_eth_waitrequest

Port 2:

i_p2_reconfig_eth_addr[13:0]

i_p2_reconfig_eth_read

i_p2_reconfig_eth_write

i_p2_reconfig_eth_byteenable[3:0]

o_p2_reconfig_eth_readdata[31:0]

o_p2_reconfig_eth_readdata_valid

i_p2_reconfig_eth_writedata[31:0]

o_p2_reconfig_eth_waitrequest

Port 3:

i_p3_reconfig_eth_addr[13:0]

i_p3_reconfig_eth_read

i_p3_reconfig_eth_write

i_p3_reconfig_eth_byteenable[3:0]

o_p3_reconfig_eth_readdata[31:0]

o_p3_reconfig_eth_readdata_valid

i_p3_reconfig_eth_writedata[31:0]

o_p3_reconfig_eth_waitrequest

关于收发器重配置 Avalon 存储器映射接口的信息,请参考F-Tile Architecture and PMA and FEC Direct PHY IP User Guide