DDMA - Direct Memory Access Controller
关于此报价
The DDMA is a four-channel Direct Memory Access Controller. Its purpose is to transfer data between memories and peripherals to reduce CPU utilization during data transfers. It can be programmed by the CPU via a 32-bit or 8-bit native interface. The DDMA can perform data transactions of configurable size over 32-bit address space. A single transaction size can be set in a range from 1B to 16MB. To limit the negative impact of different reads and writes timing the DDMA features transfer data buffer. This buffer is a 32-bit FIFO memory with configurable depth.
技术规格
- 类别:
- 软件和 IP 核: FPGA 知识产权内核: 处理器和外设: 外设
- 最终客户类型:
-
企业
采用的英特尔技术
英特尔® Stratix® 10 FPGA 和 SoC FPGA
英特尔® Arria® 10 FPGA 和 SoC FPGA
英特尔® MAX® 10 FPGA
Stratix® V FPGA
Arria® V FPGA 和 SoC FPGA
英特尔® Cyclone® 10 FPGA
Cyclone® V FPGA 和 SoC FPGA
DIGITAL CORE DESIGN
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Ddma - Direct Memory Access Controller
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