DQSPI - Serial Peripheral Interface Master/Slave with single, dual and quad SPI Bus support
关于此报价
The DQSPI is a revolutionary quad SPI designed to offer the fastest available operations for any serial SPI memory. It is flexible enough to interface directly with numerous standard product peripherals from several manufacturers. Moreover, IP Core supports all 8, 16, 32 bit processors available on the market. The DQSPI is a fully configurable SPI master/slave device, which allows user to configure polarity and phase of serial clock signal SCK. It lets the microcontroller to communicate with fast serial SPI memories and serial peripheral devices. Moreover, it's capable of interprocessor communications in a multi-master system.
技术规格
- 类别:
- 软件和 IP 核: FPGA 知识产权内核: 处理器和外设: 外设
- 最终客户类型:
-
企业
资源
采用的英特尔技术

Cyclone® II FPGA

Cyclone® IV FPGA

英特尔® MAX® 10 FPGA

Cyclone® V FPGA 和 SoC FPGA

英特尔® Arria® 10 FPGA 和 SoC FPGA

英特尔® Stratix® 10 FPGA 和 SoC FPGA

Arria® FPGA

Cyclone® III FPGA

Stratix® V FPGA

Stratix® III FPGA

英特尔® Cyclone® 10 FPGA

Stratix® IV FPGA

Stratix® FPGAs

Arria® V FPGA 和 SoC FPGA

Arria® II FPGA

Stratix® II FPGA

Cyclone® FPGAs
DIGITAL CORE DESIGN
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Digital Core Design is a leading Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house. The company was founded in 1999 and thanks to in-depth specialization and innovat...
Dqspi - Serial Peripheral Interface Master/slave With Single, Dual And Quad Spi Bus Support
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