DI2CSB - I2C Bus Interface Slave -Base version
关于此报价
DI2CSB bridge to APB, AHB, and AXI bus, provides an interface between a passive target device e.g. memory, LCD display, pressure sensors, etc., and the I2C bus. It can work as a slave receiver or transmitter depending on a working mode determined by the master device. A very simple interface, composed of reading, write, and data signals, allows easy connection to target devices. The core does not require any programming and is ready to work after power-up/reset. Read, write, burst read, burst write and repeated start transmissions are automatically recognized by the core. The solution incorporates all features required by the I2C specification
技术规格
- 类别:
- 软件和 IP 核: FPGA 知识产权内核: 处理器和外设: 外设
- 最终客户类型:
-
企业
资源
采用的英特尔技术
英特尔® Arria® 10 FPGA 和 SoC FPGA
DIGITAL CORE DESIGN
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Di2csb - I2c Bus Interface Slave -base Version
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