JPEG-EX-F: Ultra-Fast Baseline and Extended JPEG Encoder
关于此报价
This IP core supports the Baseline Sequential DCT and the Extended Sequential DCT modes of the ISO/IEC 10918-1 standard. It implements a scalable, ultra-high-performance, hardware JPEG encoder that can compress high pixel rate video using significantly fewer silicon resources and less power than encoders for video compression standards such as HEVC/H,265, DSC, AVC/H.264, or JPEG200. The JPEG-EX-F Encoder produces compressed JPEG images and the video payload for Motion-JPEG container formats. It accepts images with up to 12-bits per color samples and up to four color components, in all widely-used color subsampling formats. Depending on its configuration, the encoder processes from 2 to 32 color samples per clock cycle, enabling it to compress UHD (4K/8K) video and/or very high frame video. The core operates without any assistance from the host processors, and uses AXI-stream interfaces for pixel and stream data, and a 32-bit APB slave interface for registers access.
技术规格
- 类别:
- 软件和 IP 核: FPGA 知识产权内核: DSP: 视频和图像处理
- 最终客户类型:
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中小企业
其它
企业
资源
采用的英特尔技术
Stratix® V FPGA
Stratix® IV FPGA
英特尔® Arria® 10 FPGA 和 SoC FPGA
Arria® V FPGA 和 SoC FPGA
英特尔® Agilex™ 7 FPGA 和 SoC FPGA
英特尔® Cyclone® 10 FPGA
Cyclone® IV FPGA
Cyclone® V FPGA 和 SoC FPGA
英特尔® Stratix® 10 FPGA 和 SoC FPGA
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Jpeg-ex-f: Ultra-fast Baseline And Extended Jpeg Encoder
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