Agilex™ 7 FPGA接口协议设计历程

交互式FPGA接口设计之旅提供精选文档列表,帮助您成功设计具有相关软件驱动程序的逻辑接口,以将您的用户逻辑应用连接到电路板上的组件,例如内存、闪存设备、以太网、主机服务器到FPGA接口(即 PCIe 或 CXL)、嵌入式外设,通过 I2C、SPI、UART、 USB等以及视频,无线和有线通信接口。FPGA接口设计在用户逻辑应用和主板细节之间提供了一个抽象层,从而实现了可移植性、设计复用和高级设计流程。选择下面的界面,然后在左侧导航中选择所需的设计步骤,以查找可用资源。

Back to Design Hub

Design with IO Design with GPIO and LVDS IO Design with PHY Lite IP Discover Transceiver Tiles Select Transceiver Tile Design with Transceiver Tiles Design with E-Tile Design with F-Tile Design with P-Tile Design with R-Tile
Please select the desired journey step from the flowchart to the left to view the applicable assets.