DESPI - Enhanced Serial Peripheral Interface – Master/Slave with single, dual, and quad eSPI Bus support for Intel® CPU’s
关于此报价
The DESPI is a fully configurable eSPI master/slave device supporting all features described in Enhanced Serial Peripheral Interface Base Specification rev. 1.0. The DESPI master is to be used by the microcontroller to communicate with eSPI peripheral devices. The DESPI slave is to be used as an eSPI peripheral device, e.g. an Embedded Controller attached to the Intel® CPU system.
技术规格
- 类别:
- 软件和 IP 核: FPGA 知识产权内核: 处理器和外设: 外设
- 最终客户类型:
-
企业
中小企业
采用的英特尔技术
Cyclone® V FPGA 和 SoC FPGA
Arria® V FPGA 和 SoC FPGA
英特尔® Stratix® 10 FPGA 和 SoC FPGA
英特尔® Cyclone® 10 FPGA
英特尔® Arria® 10 FPGA 和 SoC FPGA
Stratix® V FPGA
DIGITAL CORE DESIGN
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Digital Core Design is a leading Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house. The company was founded in 1999 and thanks to in-depth specialization and innovative approach we have introduced more than 70 different architectures. Among them you can find e.g. World’s Fastest 8051 CPU, World’s Smallest 8051 CPU, silicon proven and royalty-free 32-bit CPU, Automotive LIN, CAN, CAN-FD, CAN-XL controllers
Despi - Enhanced Serial Peripheral Interface – Master/slave With Single, Dual, And Quad Espi Bus Support For Intel® Cpu’s
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